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Ladder Logic Program

by Vaidyanath 'Doc' Nanjundaiah

Download Ladder Logic Simulator 6.41 from our website for free. The program's installer is commonly called Ladder Logic Simulator.exe. This free program is an intellectual property of Triangle Research International, Inc. This download was checked. LADDER LOGIC 'Ladder' diagrams Ladder diagrams are specialized schematics commonly used to document industrial control logic systems. They are called 'ladder' diagrams because they resemble a ladder, with two vertical rails (supply power) and as many 'rungs' (horizontal lines) as there are control circuits to represent. Ladder Logic is a graphical based industrial programming language used to program and configure Programmable Logic Controllers, or PLC’s. Ladder programs consist of rungs that house instructions. Once compiled and downloaded to a PLC the ladder program is scanned like a book; from top-to-bottom, left-to-right. Examine If Closed XIC. We've looked at these instructions at the start of the. Hello!In this video I am showing you an algorithm that helps you to convert a GRAPH program into a LADDER logic program. Sometimes on the field we can not us.

A Programmable Logic Controller (PLC) accepts inputs from a variety of devices such as switches, sensors etc., processes inputs according to user programmed control logic, and controls a variety of devices (e.g. relay, motors, valves etc.) connected to the outputs of the PLC. The Relay Ladder Logic is the user programmed control algorithm.
Relay Ladder Logic is one of the international standards and is the main programming method used to program PLC’s. It mimics the relay logic (combination of switches, relays, coils and contacts). The decision to use ladder logic as the main programming method was very strategic as it did not need much time to retrain engineers to adapt to this. The first generation PLCs were programmed with a technique that was based on relay logic wiring schematics. This eliminated the need to teach electricians, maintenance technicians and engineers how to program. To this day, it remains the most popular method to program a PLC.

Comparison between Relay Logic and Ladder Logic.

Below is a very simple motor control relay logic and it’s corresponding ladder logic. Relay Logic has a Start switch, Stop switch, Control Relay, Relay Coil (CR1) and a Motor (Mtr). Ladder logic shares similar look and feel of relay logic. But the physical switches and coils of relay logic are replaced with PLC’s memory location which are represented as Inputs (I) and Outputs (O) in ladder logic.

Typically the PLC CPU scans the ladder from top left to bottom right and reads and executes the condition of physical I/O’s. The time taken to make one pass from top to bottom and execute logic is known as scan time.

A PLC system handles many numbers representing different types of information regarding the process. These process/machine parameters may be anything from the status of the input or output devices, timers/counters, or other data values. Each PLC manufacturer has their own conventions for this in their PLCs. These memory types can be used to store a variety of information and can be used inside various Relay Ladder Logic instructions.

Discrete / Boolean Memory Type

A Discrete memory type is one bit that can be either a 1 or a 0 (ON or OFF). Discrete memory area is used for inputs, outputs, control relays, and timer/counter bits.


Word / Register Memory Type

A Word memory type is a 16-bit location that is normally used to store and manipulate numeric or ASCII data. A word memory location is also called a Register.


PLC CPU Operation Sequence:

Power-up Initialization

At power-up, the CPU initializes the internal electronic hardware. It also checks if all the memories are intact and the system bus is operational. It sets up all the communication registers. It checks the status of the backup battery. If all registers are go, the CPU begins its cyclic scan activity as described below.

Read Inputs: The CPU reads the status of all inputs, and stores them in an image table. IMAGE TABLE is PLC’s internal storage location where it stores all the values of inputs/outputs for ONE scan while it is executing ladder logic. CPU uses this image table data when it solves the application logic program. After the CPU has read all the inputs from input modules, it reads any input point data from the Specialty modules like High Speed Counters.

Execute Logic Program: This segment is also called Ladder Scan. The CPU evaluates and executes each instruction in the logic program during the ladder scan cycle. The rungs of a ladder program are made with instructions that define the relationship between system inputs and outputs. The CPU starts scanning the first rung of the ladder program, solving the instructions from left to right. It continues, rung by rung, until it solves the last rung in the main logic. At this point, a new image table for the outputs is updated.

Write Outputs: After the CPU has solved the entire logic program, it updates the output image table. The contents of this output image table are written to the corresponding output points in I/O Modules. After the CPU has updated all discrete outputs, it scans for the specialty modules. The output point information is sent to the specialty I/O like High Speed Counters.

Immediate Inputs/Outputs: There is a possibility that an input changes after the CPU has read or scanned the inputs. If you have an application that cannot wait until the CPU returns for the next input scan, you can use Immediate Instructions.

These instructions do not use the status of the input from the image table to solve the application program. The Immediate instructions immediately read the input status directly from I/O modules and update the Input table with appropriate status of input module read. Similarly, Immediate Output instructions do not wait for the CPU to complete the ladder scan. Immediate outputs are directly written to the image table and Outputs are updated accordingly.

Subroutines: The CPU executes subroutines when called for in the ladder program. These subroutines are useful in performing the same logic operation time and time again just upon one call so you do not have to repeat the rung logic over and over again. Subroutines are also useful in executing a logical function, for example check limits, upon receiving an external interrupt from a PLC I/O module.

I/O Response Time:

I/O response time is typically defined as the time required for the control system to note a change in an input point and update a corresponding output point. In majority of the applications, the processor of a PLC responds practically instantaneously to this task. There are some applications that require extremely fast I/O scan times. The following four factors affect the I/O response time of a CPU:

1. The point in the scan period when the field input changes its state.
2. Delay time for Input module to change state.
3. CPU scan time.
4. Delay time for Output module to change state.

See the diagram above. The I/O response time is minimum when the I/O module gets the input change before the Read Inputs portion of the Ladder execution scan cycle. In this case the input status is read, the logic program is solved, and the corresponding output point gets updated. The total I/O response time is calculated as:

I/O Response = Delay in Input module + CPU Scan Time + Delay in Output module

Maximum I/O Response Time:

The I/O response time is maximum when the I/O module notes an input change after the Read Inputs portion of the Ladder execution scan cycle. In this case the input status gets noted only in the following Input scan. The diagram shows an example of I/O response timing for this condition. The total I/O response time is calculated as:

I/O Response = Delay in Input module + 2 times the CPU Scan Time + delay in output module

How to get the best I/O Response time:

Using Interrupt subroutines and Immediate I/O instructions is the best way to optimize the I/O Response time of your PLC system. The immediate instructions update the I/O points during the ladder logic program execution.

The diagram shows how immediate input and output instructions affect the I/O response timing.

The total I/O response time is simply calculated as: I/O Response = Delay in Input module + Instruction Execution Time + Delay in Output module + Instruction Execution Time = Immediate Input Instruction Execution + Immediate Output Instruction + Time for Execution of all Instructions in between.

The total I/O response time for an external interrupt and a subroutine is calculated as:

Delay in Input Module + execution of subroutine + delay in output module.

As an example, upon an interrupt you can read the status of an input bit, perform a logical operation on it based upon the value of some other registers, and turn on an output in less than 50μs.

CPU Scan Time Considerations:

The scan time includes all the tasks that are performed by the operating system in a cyclic manner. As discussed previously, each scan cycle is made up of several segments. Each of these segments takes a certain amount of time to execute. Among all the segments, the amount of time it takes to execute the application program is the only one that has maximum influence on total scan time. This also happens to be the one segment you can control as a user. If your application needs a smaller scan time, then you should try to choose instructions with as fast execution time as possible. This is because different instructions take different amounts of time to execute. Your choice of I/O modules and system configuration can also affect the scan time.

Conclusion: If you are new to Relay Ladder Logic Programming, here is a sequence you should follow to develop Relay Ladder Logic program.

  • Define your machine automation or automated process.
  • Determine hardware requirements for the control design.
  • Define control algorithm.
  • Assign input and output parameters of the process to the control algorithm.
  • Develop relay ladder logic project.
  • Match I/O addresses of the controller to the correct input/output devices.
  • Transfer the project to the PLC.
  • Validate the project.
  • Run the PLC / project.

What are the Ladder Logic Symbols?

Ladder Logic is one of the most common PLC programming languages. The standards of the language are well documented by the International Electromechanical Commission (IEC) in the exhibit 61131-3. However, official documentation of the ladder logic symbols isn’t easy to digest and doesn’t provide concrete examples of each one.

Ladder Logic symbols are foundational elements that are memorized by every plc programmer. They’re essential to know if you plan to do any work with this PLC programming language.

In this tutorial, we will discuss each symbol, the functionality it brings to the ladder logic plc programming language as well as illustrate two examples where they may be used.

Normally Open (NO) Contact / Examine if Closed (XIC)

The most fundamental symbol of ladder logic programming is the Normally Open Contact or the Examine If Closed XIC Instruction. This symbol was created as a direct reapplication of the relay-based contact used in early electrical drawings.

How does the Normally Open Contact Work?

Initially, the contact was tied to a coil of an electrical relay. When the coil of the relay was energized, the contact would close. The ladder logic symbol operates in the same way. It will specify a logical bit that can be set to 0 (LOW) or 1 (HIGH). Based on the state, the instruction will either evaluate to TRUE or FALSE. If the instruction is TRUE, it will let the current through and allow the PLC to evaluate the next instruction. If it’s FALSE, the ladder logic symbol will stop the execution there.

Practical Application of the Ladder Logic Symbol - NO Contact / XIC

The Normally Open Contact symbol is prevalent in ladder logic. It’s the most basic logical check for most conditions in PLC programming.

1. Verification of an Input

The rung above is using the Normally Open Contact to verify the “PointIORack1:1:I.0” input. If the input is energized (HIGH), the condition indicates that the “Box Counter Photo Eye - No Box” is turned ON. In other words, there’s no box in front of the Photo-Eye present on the line.

Ladder logic programming examples

2. Count Up Condition

The rung above is using the Normally Open Contact to enable the “BoxCounter” CTU instruction. Each time that the NO Contact transitions from LOW to HIGH, the counter will increment by 1. As shown in the rung, the counter has counted ten boxes and is now set to the .DN (Done) condition.

Normally Closed (NC) Contact / Examine if Open (XIO)

The opposite of the Normally Open Contact is the Normally Closed. This validation will look at the specified bit and evaluate to TRUE when the bit is de-energized and FALSE when it’s energized. The application would allow the user to check if the coil of the specified bit is de-energized and take appropriate action in ladder logic PLC programming.

How does the Normally Closed Contact Work?

The normally closed contact would also be tied to the coil of a solid state relay. When the coil has no current running through it, the contact would let current to flow through. However, when the coil would be energized, no current would flow through the contact. The NC Contact or the XIO instruction in PLC programming ladder logic would work the same way. In other words, the bit would allow the current to flow through when it’s LOW and no current would flow through when the bit is HIGH.

Ladder Logic Programming Basics

Logic

Practical Application of the Ladder Logic Symbol - NC Contact / XIO

The XIO is very common in the ladder logic plc programming language. It’s an instruction that allows us to examine the OFF state of a bit as described above. Here are two common examples of where this instruction is used.

1. Stop Button Condition

The rung above incorporates the normally open and normally closed ladder logic symbols. It creates a condition that will energize the GREEN_LIGHT_ON bit when the “START_PRESSED” is energized. However, the XIO is tied to two bits: STOP_PRESSED and RESET_PRESSED. When either one of these conditions is set to HIGH, the “GREEN_LIGHT_ON” bit will be set to LOW during the rung evaluation cycle.

2. Timer Continuous Latch

The rung above will allow the Timer to operate based on the HMI_Rotation_Enable condition. However, a typical timer would count until it reaches the “Preset” value. In the rung above, the timer will reset once the timer is set to .DN (Done) due to the XIO being tied to the same bit of the timer.

Output Energize (OTE)

When certain conditions are met, the system should take a certain action. Unlike the two symbols above, the output energize will be used to execute an action. Within the scope of an electrical diagram, this symbol would indicate that a coil of a relay needs to be energized when conditions are met.

How does the Output Energize Symbol Work?

The output energize ladder logic symbol will change the state of a bit based on the conditions specified on the left side of the rung. When the conditions are TRUE leading to the OTE instruction, the value of the specified bit will be set to HIGH or 1. When the conditions are FALSE, the OTE instruction will set the value of the same bit to LOW or 0.

Practical Application of the Ladder Logic Symbol - Output Energize

The OTE instruction is very common in ladder logic applications. As mentioned above, it’s used to drive outputs based on certain conditions. This translates to operating external PLC hardware such as relays, motor contactors, valves, cylinders, etc. By energizing the bit that is tied to the output, a PLC programmer can change the state of the output to the desired position.

1. Turn ON Light / Output

In the rung above that we’ve already seen, the output is energized when the conditions are met. The “GREEN_LIGHT_ON” bit is tied to an output of the PLC that will turn on an LED in the field. By using the Output Energize (OTE) Instruction, the PLC programmer will turn ON the light on the plant floor.

2. Set the System to Faulted State

The following rung verifies one faulted condition: System 1 - Fault. When the system is faulted for that specific reason, the “RPiS_BOOL[5]” bit will be set to HIGH through the Output Energize (OTE) Instruction. Once the system is no longer faulted, the faulted status will remain ON until the Reset button is energized and validated through the XIO condition. The Reset will allow the OTE instruction to clear the bit and set the faulted state back to LOW.

Program

Output Latch (OTL)

The Output Latch ladder logic symbol is not something that can be created with relay based logic. This instruction will permanently keep a bit set to 1 when the condition holds.

How does the Output Latch Symbol Work?

The output latch instruction will execute only when the preceding conditions are TRUE. If they are, the instruction will set the bit associated with the OTL to HIGH (1). If the bit is set to 1 or the conditions are no longer true, the bit will remain HIGH (1). This difference is important as the Output Energize (OTE) will set the bit back to 0.

Practical Application of the Ladder Logic Symbol - Output Latch

The OTL instruction is not commonly used in ladder logic programming. The reason is mentioned above: the instruction will not automatically reset the bit back to 0. This minor difference leads to code confusion and potential issues when it comes to executing, changing or evaluating conditions after implementation.

1. Fault Latching

As we discussed before, faults play a critical role in PLC programming. It’s important to properly detect, act upon and identify the faults occurred within the system. Once they occur, the user will throw the faults to the operator in order to troubleshoot. For that reason, it’s important to keep the faults in place until the system is audited and reset when deemed operational.

The rung above displays a condition in which we are required to clear a fault on a variable frequency drive PowerFlex 525. Once the fault is latched, the motor is kept in a faulted state while a separate routine takes care of safely stopping the drive. The OTL will set the bit to HIGH and wait until the fault is reset.

Ladder Logic Programming Pdf

2. Condition Setting

In the rung above, the OTL instruction is used to open the valve of the riser. Although this could have been achieved through an output energize (OTE) instruction, we’ve decided to use the OTL due to a number of conditions that may set the bit RiserBOOL[0] to HIGH. Note that this routine also contains the OTU that will reset the bit back to LOW as needed by the PLC programmer.

Output Unlatch (OTU)

The Output Unlatch ladder logic symbol is often used in conjunction with the OTL. It’s a way to create a disable of the bit specified within the logic of the controller.

How does the Output Unlatch Symbol Work?

The output unlatch instruction will execute only when the preceding conditions are TRUE. If they are, the instruction will set the bit associated with the OTU to LOW (0). If the bit is set to 0 or the conditions are no longer true, the bit will remain LOW (0).

Practical Application of the Ladder Logic Symbol - Output Unlatch

The OTU instruction will have to be used with the OTL in order to reset the bit back to LOW as discussed above. Therefore, this instruction will be always found whenever the OTL is used. Let’s examine the same two examples, as we saw above.

1. Fault Latching

In the rung above, once the fault is cleared through the Reset_PB XIC instruction, the fault is unlatched using the OTU instruction. Notice that the unlatch is within the same branch as the PF1:O.ClearFaults instruction that will be energized once the reset is set.

Ladder Logic Programming Language

Conclusion

Ladder Logic Program

The five most used ladder logic symbols are as follows: Normally Open Contact, Normally Closed Contact, Output Energize, Output Latch and Output Unlatch. These five instructions are commonly used in ladder logic for bit manipulation. The first two are conditional instructions that will allow the current to flow depending on the status of the bit. The last three are output instructions that will execute if the logic leading to them is TRUE. They will set the bit to either 0 or 1 depending on the instruction used.